This tutorial takes you through all that you need to perform the re-characterization of the OSU standard cell library for different voltages.


You need follow files to run SignalStorm library characterizing feature.

  • The file that contains the sub circuit spice netlist of your standard library: iit018_stdcells.sp
  • The spice model: tsmc18.m
  • The slc setup file:
  • Signalstorm characterization script: setup_signalstorm, ss_step1, ss_step2, ss_step3, finish_signalstorm
  • License file: license.dat.cadence, synopsys_hspice.dat
  • Cell area information: tsmc18_cells.area, cells_mergearea
  • Footprint information: footprint.def


To this end, download all the tar-balls for the Source Bin andIIT_template. Download these to the directory where re-characterization is going to be performed, unzip and untar. A change of permissions might be in order.


Most of the commands below are specific to North Carolina State University.

% add cadence
% add hspice

THE COMMAND BELOW NEEDS TO BE RUN IN ONE SINGLE LINE .. could not get it to work for the html format

% ipsd
% ipsc
% ipsc -n hspice -i

The above commands lead to the checking out of the licenses required for running SignalStorm and setting up the required simulation requirements for dealing with HSPICE.


The first thing that needs to be done for a re-characterization is the change of the parameters in the file where, in this case, we would need to change the voltage. The following commands need to be done in turn to do the characterization:

% setup_signalstorm (This is the traditional route but seems to give errors because of the installation of MAGIC) hence we replace it with
  slc -S ss_step1
% slc -S ss_step2 
% slc -S ss_step3
% finish_signalstorm

The ss_step2 file needed modification where we had to add a db_spice line for each standard cell [for eg. db_spice -keep_log -d AND2X1]). The re-characterization has been automated in which creates an IIT_xx folder for each re-characterization voltage “xx” which is listed in the line @voltages = (1.5, 2.0, 2.1, 2.5, 2.7); of the file.


  • After running setup_signalstorm: a directory tsmc18.ipdb will be created which contains the test vectors of each cell in the standard cell library.
  • After running slc -S ss_step2: two directories sigstormlc.log and are created. sigstormlc.log stores the log file of signalstorm library characterization for each std cell. stores the characterization (hspice simulation) results. slc.log and slc_cmd.log is the log file and command log file for this characterization.
  • After running slc -S ss_step3: tsmc18.alf & tsmc18.rep created.
  • After running finish_signalstorm: tsmc18.lib, tsmc18.tlf, tsmc18.v, tsmc18.vhdl and are created. tsmc18.lib and tsmc18.tlf are timing libraries. Tsmc18.v is gate level delay for each cell in verilog format. tsmc18.vhdl are gate level delay for each cell in VHDL format.